DocumentCode
3046396
Title
Microprocessor implementation of an LPC-based isolated word recognizer
Author
Ackenhusen, John G. ; Rabiner, L.R.
Author_Institution
Bell Laboratories, Murray Hill, New Jersey
Volume
6
fYear
1981
fDate
29677
Firstpage
746
Lastpage
749
Abstract
A digital-based isolated word recognition system has been implemented in a module of dedicated hardware that uses a microprocessor and programmable digital signal processing circuitry. The recognizer is based upon the minimum prediction residual principle of Itakura. The recognition algorithm has been developed and tested on a general-purpose minicomputer and array processor, where it has been shown to be suitable for several recognition tasks. The recognition hardware consists of an Intel 8086 16-bit microprocessor operating in parallel with a digital speech processing peripheral (DSPP) tailored to the algorithm. The microprocessor performs the supervisory and decision operations; the DSPP performs the 200,000T + 4,500N multiply-add operations (and associated data transfers) associated with the recognition of a word of duration T sec from an N word vocabulary with 1 template per word. The recognizer is compact (board area of 250 sq. in.) and inexpensive (commercial component cost of about $1200 for 40 word templates).
Keywords
Circuit testing; Costs; Digital signal processing; Hardware; Microcomputers; Microprocessors; Signal processing algorithms; Speech processing; Speech recognition; Vocabulary;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '81.
Type
conf
DOI
10.1109/ICASSP.1981.1171235
Filename
1171235
Link To Document