A nested algorithm for improving the accuracy of chirp-Fourier transform implementations

The chirp Z-transform permits large bandwidth (i.e. high speed) analog devices to be used to compute the Discrete Fourier Transform (DFT). Such Implementations are often faster and/or smaller than all digital Fast Fourier Transforms (FFT´s), but suffer from accuracy limitations imposed by the analog devices. In this paper, we present a nested algorithm that permits excess bandwidth of the analog device to be exploited in order to compute the DFT more accurately. The nested structure can be realized with a single analog device, and can be trained to the errors associated with the device. Algorithm performance is verified through computer simulations in which DFT accuracy is limited due to fixed tap weight errors in the FIR filter portion of the chirp Z-transform.