DocumentCode
3048000
Title
Degradation of the low voltage power MOSFET electrical parameters during multipulse UIS test
Author
Marek, Jiri ; Donoval, Daniel ; Petrus, M. ; Stuchlikova, O. ; Chvala, Ales ; Molnar, Miklos ; Pribitny, P.
Author_Institution
Inst. of Electron. & Photonics, Slovak Univ. of Technol., Bratislava, Slovakia
fYear
2012
fDate
11-15 Nov. 2012
Firstpage
183
Lastpage
186
Abstract
Degradation of low voltage power MOSFET electrical parameters induced by high field and subsequent avalanche mechanisms during multipulse UIS test is presented. Unclamped inductive switching (UIS) condition represents the harsh circuit switching operation for evaluating the “ruggedness”. Introduction of multi-pulse UIS test better corresponds to a real industrial situation where devices have to sustain several consecutive stress pulses. Strong degradation of CV curves without degradation of IV curves was observed after 6 millions of stress pulses was observed. Deep levels generated by hot carriers during UIS were studied using DLTS measurement set-up. Obtained deep level traps were taken into account for the numerical simulations to verify measurements.
Keywords
avalanche breakdown; hot carriers; power MOSFET; CV curve; DLTS measurement; IV curve; avalanche mechanism; deep level; electrical parameter degradation; harsh circuit switching operation; hot carrier; low voltage power MOSFET; multipulse UIS test; ruggedness; unclamped inductive switching; Capacitance; Degradation; Logic gates; Semiconductor device measurement; Switching circuits; Transistors; Voltage measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Devices & Microsystems (ASDAM), 2012 Ninth International Conference on
Conference_Location
Smolenice
Print_ISBN
978-1-4673-1197-7
Type
conf
DOI
10.1109/ASDAM.2012.6418572
Filename
6418572
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