DocumentCode
3051892
Title
Processor-core based design and test
Author
Marwedel, Peter
Author_Institution
Dortmund Univ., Germany
fYear
1997
fDate
28-31 Jan 1997
Firstpage
499
Lastpage
502
Abstract
This paper responds to the rapidly increasing use of various cores for implementing systems-on-a-chip. It specifically focusses on processor cores. We give some examples of cores, including DSP cores and application-specific instruction-set processors (ASIPs). We mention market trends for these components, and we touch design procedures, in particular the use of compilers. Finally, we discuss the problem of testing core-based designs. Existing solutions include boundary scan, embedded in-circuit emulation (ICE), the use of processor resources for stimuli/response compaction and self-test programs
Keywords
application specific integrated circuits; circuit CAD; circuit analysis computing; logic testing; DSP cores; application-specific instruction-set processors; boundary scan; compilers; design procedures; embedded in-circuit emulation; processor cores; processor-core based design and test; self-test programs; stimuli/response compaction; systems-on-a-chip; Application specific processors; Automotive electronics; Built-in self-test; Compaction; Digital signal processing; Embedded system; Emulation; Ice; Process design; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1997. Proceedings of the ASP-DAC '97 Asia and South Pacific
Conference_Location
Chiba
Print_ISBN
0-7803-3662-3
Type
conf
DOI
10.1109/ASPDAC.1997.600316
Filename
600316
Link To Document