• DocumentCode
    3059579
  • Title

    A 32 kb/s toll quality ADPCM codec using a single chip signal processor

  • Author

    Nishitani, Takao ; Aikoh, Shiniehi ; Araseki, Takashi ; Ozawa, Kazunori ; Maruta, Rikio

  • Author_Institution
    Nippon Electric Co., Ltd., Kawasaki, Japan
  • Volume
    7
  • fYear
    1982
  • fDate
    30072
  • Firstpage
    960
  • Lastpage
    963
  • Abstract
    An ADPCM codec, that can provide toll quality speech at a 32 kb/s transmission rate, has been implemented on a single chip signal processor. Maximum effort has been paid to design a robust adaptation scheme for a quantizer and a predictor to withstand transmission bit errors. The codec employs a simplified robust quantizer and also employs a new backward adaptive predictor. The decoder, including the new adaptive predictor, has a structure having fixed poles and adaptive zeros, attaining both high prediction capability and robustness. The performance of a developed codec, which has analog interface capability through a PCM codec chip, satisfies the standard 64 kb/s PCM performance specification in CCITT recommendation G.712.
  • Keywords
    Code standards; Codecs; Decoding; Phase change materials; Poles and zeros; Robustness; Signal processing; Signal processing algorithms; Speech coding; Transfer functions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '82.
  • Type

    conf

  • DOI
    10.1109/ICASSP.1982.1171868
  • Filename
    1171868