• DocumentCode
    3069566
  • Title

    Open/folded bit-line arrangement for ultra high-density DRAMs

  • Author

    Takashima, D. ; Watanabe, S. ; Sakui, K. ; Nakano, H. ; Ohuchi, K.

  • Author_Institution
    ULSI Res. Center, Toshiba Corp., Kawasaki, Japan
  • fYear
    1993
  • fDate
    19-21 May 1993
  • Firstpage
    89
  • Lastpage
    90
  • Abstract
    A new open/folded bit-line (BL) arrangement for ultra high-density DRAMs is proposed. The proposed arrangement was successfully verified by the test chip. This arrangement features a 6F/sup 2/ memory cell and relaxed sensing amplifier of 3 times the pitch of BL. The chip size with this arrangement can be reduced to 81.6% of that of the folded BL arrangement, without introducing the complicated memory cell structure and without sacrificing access speed and power dissipation. Moreover, the proposed arrangement has good array noise immunity in scaled DRAMs compared with the folded BL arrangement. This arrangement is one of the leading candidates for ultra high-density DRAMs.
  • Keywords
    DRAM chips; MOS integrated circuits; VLSI; 6F/sup 2/ memory cell; array noise immunity; dynamic RAM; open/folded bit-line arrangement; sensing amplifier; ultra high-density DRAMs; DRAM chips; Integrated circuit noise; MOS integrated circuits, memory; Ultra-large-scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 1993. Digest of Technical Papers. 1993 Symposium on
  • Conference_Location
    Kyoto, Japan
  • Type

    conf

  • DOI
    10.1109/VLSIC.1993.920551
  • Filename
    920551