DocumentCode
3070290
Title
Designing with partially depleted SOI
Author
Mogul, Homi ; Marshall, Andrew ; Natarajan, Sreedhar
Author_Institution
Texas Instrum. Inc., Dallas, TX, USA
fYear
2001
fDate
2001
Abstract
SOI has received some attention regarding digital circuit performance, but little for analog and memory applications. These applications pose different challenges to the designer, with body-related effects and thermal management being the most significant. Body-ties are undoubtedly an option, but are not a panacea. A variety of simple circuit applications are discussed
Keywords
SRAM chips; integrated circuit design; integrated circuit technology; silicon-on-insulator; SRAM; Si; analogue design; body-related effects; body-ties; charge pump; kink; partially depleted SOI; ring oscillators; thermal management; Capacitance; Immune system; Lead compounds; MOSFETs; Noise reduction; Random access memory; Read-write memory; Silicon on insulator technology; Thermal management; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power/Low Voltage Mixed-Signal Circuits and Systems, 2001. (DCAS-01). Proceedings of the IEEE 2nd Dallas CAS Workshop on
Conference_Location
Plano, TX
Print_ISBN
0-7803-6624-7
Type
conf
DOI
10.1109/DCAS.2001.920989
Filename
920989
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