DocumentCode
3072955
Title
Nondestructive inspection via boundary scan
Author
Miller, Ernest M.
Author_Institution
Texas Instrum. Inc., Plano, TX, USA
fYear
1989
fDate
22-26 May 1989
Firstpage
1964
Abstract
The increased use of very large scale integrated circuits (VLSI) and surface mount devices (SMD) by the PWB industry is making the job of the manufacturing quality control inspector more difficult. The attempts by the Joint Test Action Group (JTAG) to develop a worldwide standard for a testability bus can mean a bonus for the quality-control inspector. The author discusses some of the benefits this standard holds for test through the use of boundary scan architecture. It is shown that structured design-for-testability using the proposed JTAG/P1149.1 standard has the potential for aiding the inspector in detecting manufacturing defects. By providing a reliable, low-cost method of detecting and isolating these defects, boundary scan test can be a nondestructive inspection tool. The operating principle and architecture of boundary scan are described, and an implementation example is presented
Keywords
inspection; printed circuit manufacture; surface mount technology; JTAG/P1149.1 standard; Joint Test Action Group; PWB industry; boundary scan test; design-for-testability; nondestructive inspection; quality control; Circuit testing; Industrial control; Inspection; Integrated circuit manufacture; Manufacturing industries; Nondestructive testing; Quality control; Standards development; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Aerospace and Electronics Conference, 1989. NAECON 1989., Proceedings of the IEEE 1989 National
Conference_Location
Dayton, OH
Type
conf
DOI
10.1109/NAECON.1989.40487
Filename
40487
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