Multiprocessor system for speech processing and telecommunications

This paper introduces a new concept of the VLSI-compatible multiprocessor system to perform most of digital signal processing functions, required in speech processing and modern telecommunications network. High performance is achieved by high degree of concurrency and parallelism in the architecture of the processor. Identified attributes of signal processing have influenced substantially the architecture. Set of macro instructions has been defined to be stored in the local memory inside the DSP chip. This approach reduces the access time and speeds-up overall operations. The key features of the DSP processor are presented. The multiprocessor architecture is described and possible configurations are discussed.