• DocumentCode
    3081215
  • Title

    High speed dynamic asynchronous pipeline: Self-Controlled approach

  • Author

    Manuel, L. ; Midhun, C.K. ; Kavitha, R.K.

  • Author_Institution
    Broadcom Commun. Technol., Bangalore, India
  • fYear
    2012
  • fDate
    7-9 Dec. 2012
  • Firstpage
    592
  • Lastpage
    596
  • Abstract
    This paper proposes a high speed asynchronous pipeline architecture, called Self-Controlled (SC) pipeline, targeting dynamic data path. The SC pipeline uses Williams´ PSO pipeline as the base structure and delivers high throughput by introducing certain timing assumptions. The pipeline design is latch-free and provides high robustness and low latency with little design overhead. Different versions of the pipeline are implemented in a O.181lm UMC technology, with focus on low power consumption as well. The best pipeline design gives a throughput of 3.63GSampies/sec which is six times higher than the PSO design.
  • Keywords
    asynchronous circuits; logic design; PSO pipeline design; UMC technology; dynamic data path; high speed dynamic asynchronous pipeline architecture; power consumption; self controlled pipeline; Analytical models; Clocks; Pipelines; Robustness; Throughput; Timing; Transistors; Asynchronous Pipeline; dual-rail logic; dynamic logic; fine-grain pipelining;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    India Conference (INDICON), 2012 Annual IEEE
  • Conference_Location
    Kochi
  • Print_ISBN
    978-1-4673-2270-6
  • Type

    conf

  • DOI
    10.1109/INDCON.2012.6420687
  • Filename
    6420687