Design and implementation of Costas loop for BPSK demodulator

The paper presents hardware design of digital signal processing based PSK demodulator using Costas loop. On the basis of analyzing the mathematical models of Costas loop, a method to model and simulate it by MATLAB is put forward. The design of LPF (low-pass filter), LF (loop filter) and VCO (voltage-controlled oscillator) are researched. It is first simulated using MATLAB in analog domain and then in digital domain using digital multiplier and NCO (numerically controlled oscillator) replacing VCO. The functional simulation is accomplished in VHDL code on Modelsim simulator. The whole design is accommodated in a ProASIC3 Actel FPGA. Results show that the Costas loop could correctly realize BPSK signal´s carrier recovery and data demodulation. Results of theoretical simulation and practical engineering experiments are the same. Paper also highlights the programmable nature of the design.