DocumentCode
3084555
Title
Improving the efficiency of a hardware transactional memory on an NoC-based MPSoC
Author
Kunz, Leonardo ; Girão, Gustavo ; Wagner, Flávio R.
Author_Institution
Inst. of Inf., Fed. Univ. of Rio Grande do Sul - UFRGS, Porto Alegre, Brazil
fYear
2011
fDate
14-18 March 2011
Firstpage
1
Lastpage
4
Abstract
Transactional Memories (TM) have attracted much interest as an alternative to lock-based synchronization in shared-memory multiprocessors. Considering the use of TM on an embedded, NoC-based MPSoC, this work evaluates a LogTM implementation. It is shown that the time an aborted transaction waits before restarting its execution (the backoff delay) can seriously affect the overall performance and energy consumption of the system. This work also shows the difficulty to find a general and optimal solution to set this time and analyzes three backoff policies to handle it. A new solution to this issue is presented based on a handshake between transactions. Results suggest up to 20% in performance gains and up to 53% in energy savings when comparing our new solution to the best backoff delay alternative found in our experiments.
Keywords
microprocessor chips; network-on-chip; LogTM implementation; NoC-based MPSoC; backoff delay alternative; backoff policies; energy consumption; hardware transactional memory; lock-based synchronization; shared-memory multiprocessors; Delay; Energy consumption; Hardware; Memory management; Performance gain; Program processors; Synchronization; Embedded Systems; Energy Consumption; Hardware Transactional Memories; Multiprocessor Systems-on-Chip; Networks-on-Chip; Performance;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011
Conference_Location
Grenoble
ISSN
1530-1591
Print_ISBN
978-1-61284-208-0
Type
conf
DOI
10.1109/DATE.2011.5763305
Filename
5763305
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