Image-reject receivers with image-selection functionality

Author

Stadius, Kari ; Järviö, Petri ; Paatsila, Petteri ; Halonen, Kari

Author_Institution

Electron. Circuit Design Lab., Helsinki Univ. of Technol., Espoo, Finland

Volume

4

fYear

2001

fDate

6-9 May 2001

Firstpage

124

Abstract

Two image-reject receiver implementations based on the Hartley architecture are presented in this paper. The concept of image selection is introduced and various implementation methods are discussed. Both designed receiver circuits include a LNA, two mixers, a polyphase filter as a combiner, an IF amplifier and a frequency divider chain for LO generation. The first circuit implementation has a measured gain of 46 dB, an image-rejection-ratio >40 dB and a noise figure of 6 dB at the 700 MHz input frequency and 40-MHz IF frequency. Correspondingly, the second receiver has a 52-dB gain, an image-rejection-ratio >16 dB and a noise figure =6 dB. The circuits were fabricated in a 0.9-μm SiGe bipolar process

Keywords

radio receivers; 0.9 micron; 46 dB; 52 dB; 6 dB; 700 MHz; Hartley architecture; IF amplifier; LNA; LO generation; SiGe; SiGe bipolar circuit; combiner; frequency divider; gain; image reject receiver; image rejection ratio; image selection; mixer; noise figure; polyphase filter; Adders; Circuit synthesis; Frequency conversion; Low-noise amplifiers; Passive filters; Phase shifters; Signal generators; Signal processing; Switches; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on

Conference_Location

Sydney, NSW

Print_ISBN

0-7803-6685-9

Type

conf

DOI

10.1109/ISCAS.2001.922186

Filename

922186