DocumentCode
3091767
Title
Proposed CMOS VLSI implementation of an electronic neuron using multivalued signal processing
Author
Taheri, Babak A.
Author_Institution
SRI Int., Menlo Park, CA, USA
fYear
1991
fDate
26-29 May 1991
Firstpage
203
Lastpage
209
Abstract
Several approaches to the hardware implementation of an electronic neuron are presented and compared. A hardware implementation of a neuron that uses a voltage-controlled input weights is introduced, and its simulated performance presented. This electronic neuron circuit is ideal for CMOS VLSI implementations of neural networks, because it merges, the advantages of analog and digital techniques. In addition, this pseudoanalog technique utilizes low power, high speed, and small area requirements for variety of applications
Keywords
CMOS integrated circuits; many-valued logics; neural nets; CMOS VLSI; electronic neuron; hardware implementation; neural networks; CMOS process; Circuits; Hardware; Neural networks; Neurons; Operational amplifiers; Optical signal processing; Signal processing; Signal processing algorithms; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Multiple-Valued Logic, 1991., Proceedings of the Twenty-First International Symposium on
Conference_Location
Victoria, BC
Print_ISBN
0-8186-2145-1
Type
conf
DOI
10.1109/ISMVL.1991.130730
Filename
130730
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