DocumentCode
3094670
Title
Partial product reduction based on look-up tables
Author
Mora, H. Mora ; Pascual, J. Mora ; Romero, J. L Sánchez ; López, F. Pujol
Author_Institution
Dept. of Comput. Sci. Technol. & Comput., Alicante Univ., Spain
fYear
2006
fDate
3-7 Jan. 2006
Abstract
In this paper a new technique for partial product reduction based on the use of look-up tables for efficient processing is presented. We describe how to construct counter devices with pre-calculated data and their subsequent integration into the whole operation. The development of reduction trees organizations for this kind of devices uses the inherent integration benefits of computer memories and offers an alternative implementation to classic operation methods. Therefore, in our experiments we compare our implementation model with CMOS technology model in homogeneous terms.
Keywords
CMOS logic circuits; digital arithmetic; table lookup; CMOS technology; computer memories; counter devices construction; look-up tables; partial product reduction; reduction trees organizations; Adders; Arithmetic; CMOS technology; Computer science; Costs; Counting circuits; Delay effects; Logic; Semiconductor device modeling; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on
ISSN
1063-9667
Print_ISBN
0-7695-2502-4
Type
conf
DOI
10.1109/VLSID.2006.130
Filename
1581484
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