A graph-oriented CAD tool for establishing the topological diagnostic conditions of analogue circuits

The diagnosability of analogue circuits can be assessed in terms of the interconnection pattern of the network, because faulty components introduce ill-conditions to the KVL and KCL equations, i.e. in the set of constraints of the topology. In this work, a CAD tool based on graph theory concepts is used to establish the current and voltage graphs of the circuit to be diagnosed. The tool achieves a classification of the circuit components by resorting to the kinds of electrical variables that are known or measured. From this information, several complicated graph operations are very easily executed by the program, and the above mentioned graphs are obtained