• DocumentCode
    3101561
  • Title

    Designing the design process: applying performance evaluation to verification technologies

  • Author

    Peterson, Gregory D.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Tennessee Univ., Knoxville, TN, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    21
  • Lastpage
    28
  • Abstract
    Verification times for electronic system designs typically require more than half the over-all design effort. With the substantial costs and increasing importance of system verification technologies, determining the best verification strategy, is critical to complex systems design. As a tool to improve the design process, we apply a model to perform tradeoffs between the different types of emulation, hardware acceleration, and simulation verification tools available. The predictive power of the modeling approach is applied to usage scenarios to determine the most appropriate mix of verification technologies to employ in development efforts
  • Keywords
    design engineering; formal verification; performance evaluation; electronic system design; emulation; hardware acceleration; performance evaluation; predictive model; product development; simulation tool; verification technology; Acceleration; Clocks; Costs; Emulation; Formal verification; Hardware; Power system modeling; Process design; System-on-a-chip; Virtual prototyping;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SoutheastCon 2001. Proceedings. IEEE
  • Conference_Location
    Clemson, SC
  • Print_ISBN
    0-7803-6748-0
  • Type

    conf

  • DOI
    10.1109/SECON.2001.923081
  • Filename
    923081