DocumentCode
3106971
Title
An automatic synthesizer for CMOS operational amplifiers
Author
Kuo, Chin-Yuan ; Chen, Liang-Gee ; Parng, Tai-Ming
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear
1991
fDate
25-28 Feb 1991
Firstpage
470
Lastpage
474
Abstract
A design methodology with a good trade-off between design time and quality in the automatic synthesis of CMOS operational amplifiers is presented. It is based on an iterative device sizing approach in which a multivariate interpolation technique provides a way to improve the design and the SPICE simulator gives quantitative evaluation of the resultant circuit performance in each design iteration. The methodology has been implemented and proved to be very practical and promising
Keywords
CMOS integrated circuits; circuit CAD; interpolation; linear integrated circuits; operational amplifiers; CMOS operational amplifiers; SPICE simulator; automatic synthesis; circuit performance; design methodology; design time; iterative device sizing approach; multivariate interpolation technique; Circuit simulation; Circuit synthesis; Computational modeling; Design methodology; Expert systems; Interpolation; Knowledge based systems; Operational amplifiers; SPICE; Synthesizers;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation. EDAC., Proceedings of the European Conference on
Conference_Location
Amsterdam
Type
conf
DOI
10.1109/EDAC.1991.206450
Filename
206450
Link To Document