Experiments with autonomous test of PLAs

An architecture for BIST of PLAs is presented, together with a testability analysis tool to assert test quality. The functionality of the PLA itself is utilized for stimuli generation. Experiments assert that the test patterns generated can be considered as random patterns with equal 1 and 0 probability of each input. Test quality is measured based upon computed fault detectability and estimated fault coverage at a desired confidence level. A set of 53 PLA benchmark circuits from Berkeley is used to demonstrate the features of the method. It is found that 37 of 53 PLAs are random testable to 99% fault coverage with less than 100000 patterns