Steady-state analysis of AC-to-DC converters with active input current shaper based on delayed forward output

This paper deals with the steady-state analysis of AC-to-DC converters which use the recently proposed active input current shaper (AICS) to reduce the line current harmonics in order to comply with the IEC 1000-3-2 specifications. The main equations for many topologies directly derived from the standard ones (forward, flyback, SEPIC, Cuk, half-bridge, full-bridge, push-pull, buck, boost, buck-boost, etc.) have been obtained. Special attention must be paid in the case of the buck topology, which can exhibit a voltage gain with positive and negative slope. Finally, some of the proposed topologies have been experimentally tested