A strategy for generating functional tests from device simulations

A general strategy is presented for generating functional tests (cycle and waveform definitions, timing, and vectors) from device simulations using the Lisp language. The design of a translator which uses this strategy is described. To generate a functional test from a given simulation the translator requires a cycle template for each transaction types represented in the simulation. Through evaluation of the cycle templates, the translator identifies transactions within the simulation and generates corresponding tester cycles. The translator requires a declaration of the device pins involved in the simulation. This declaration, called a pintree, is a Lisp expression which declares the device pins and organizes them hierarchically