• DocumentCode
    3112241
  • Title

    Delay test generation. II. Algebra and algorithms

  • Author

    Iyengar, Vijay S. ; Rosen, Barry K. ; Spillinger, Ilan

  • Author_Institution
    IBM, Yorktown Heights, NY, USA
  • fYear
    1988
  • fDate
    12-14 Sep 1988
  • Firstpage
    867
  • Lastpage
    876
  • Abstract
    For pt.I see ibid., p.857-66 (1988). A novel algebra is introduced for delay test generation. The algebra combines the nine natural logic values (00 , 01, 0X, 10, 11, 1X, X1, XX) with special attributes that record both heuristic choices and whatever information about waveforms is deducible algebraically (i.e. without numerical computations using actual gate delays). A test generator uses this algebra in an efficiently organized backtrack search. The test generator is linked to a delay fault simulator. Previous event-driven simulators have considered different types of events; one type of event is a change in faultless values from one test to another test, and the other type of event is a difference between faulty and faultless values. The presented simulator is driven by both types of events. Each generated test is simulated to determine the quality of detection
  • Keywords
    automatic testing; data structures; delays; digital simulation; fault location; logic testing; production testing; algebra; backtrack search; delay fault simulator; delay test generation; digital simulation; event-driven simulators; heuristic choices; natural logic values; production testing; quality of detection; waveforms; Algebra; Circuit faults; Circuit testing; Clocks; Delay effects; Discrete event simulation; Latches; Logic testing; Propagation delay; Robustness;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1988. Proceedings. New Frontiers in Testing, International
  • Conference_Location
    Washington, DC
  • ISSN
    1089-3539
  • Print_ISBN
    0-8186-0870-6
  • Type

    conf

  • DOI
    10.1109/TEST.1988.207874
  • Filename
    207874