Experiences with concurrent fault simulation of diagnostic programs

Author

Demba, Stephen ; Ulrich, Ernst ; Panetta, Karen ; Giramma, David

Author_Institution

Digital Equipment Corp., Hudson, MA, USA

fYear

1988

fDate

12-14 Sep 1988

Firstpage

877

Lastpage

883

Abstract

A methodology is presented for fault-simulation of system level diagnostic programs involving large models (50000 to 200000 gates) and long test sequences. Accuracy of memory models, interplay of target faults with diagnostic program development, and creation of shorter diagnostics are topics covered. Observation and statistical methods and tools used to investigate the operation of the faulty machine within the diagnostic program are also presented. Observation of individual faulty machines is critical to provide information about looping and erratic programs, violations of subprogram sequencing, etc. This methodology makes fault simulation of system diagnostics feasible

Keywords

automatic testing; fault location; logic testing; multiprocessing systems; automatic testing; concurrent fault simulation; diagnostic programs; logic testing; memory models; subprogram sequencing; target faults; test sequences; Counting circuits; Fault detection; Graphics; Logic; Power engineering and energy; Size measurement; Statistical analysis; Statistics; System testing; Tires;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1988. Proceedings. New Frontiers in Testing, International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-8186-0870-6

Type

conf

DOI

10.1109/TEST.1988.207875

Filename

207875