• DocumentCode
    3112370
  • Title

    Radix-22 based low power reconfigurable FFT processor

  • Author

    Wu, Gin-Der ; Liu, Yi-Ming

  • Author_Institution
    Dept. of Electr. Eng., Nat. Chi Nan Univ., Puli, Taiwan
  • fYear
    2009
  • fDate
    5-8 July 2009
  • Firstpage
    1134
  • Lastpage
    1138
  • Abstract
    Fast Fourier transform (FFT) is widely applied in the speech processing, image processing, and communication system. To implement it, a radix-22 based reconfigurable FFT processor is proposed in this paper. This architecture gets the optimal balance between flexibility and power consumption. Power saving is achieved by using the appropriate FFT size instead of a fixed large FFT size. The memory-based architecture is used to design our reconfigurable FFT processor. It can be configured to different size which ranges from 16 to 256 points. In our experiments, the proposed architecture has the advantage of low power.
  • Keywords
    digital arithmetic; fast Fourier transforms; memory architecture; microprocessor chips; power consumption; fast Fourier transform; memory-based architecture; power consumption; power saving; radix-22 based low power reconfigurable FFT processor; Asynchronous circuits; Clocks; Communication industry; Computer architecture; Delay; Energy consumption; Hardware; Memory architecture; Pipelines; Speech processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Industrial Electronics, 2009. ISIE 2009. IEEE International Symposium on
  • Conference_Location
    Seoul
  • Print_ISBN
    978-1-4244-4347-5
  • Electronic_ISBN
    978-1-4244-4349-9
  • Type

    conf

  • DOI
    10.1109/ISIE.2009.5214427
  • Filename
    5214427