Ring oscillator using InAlAs/InGaAs/InP enhancement/depletion-mode high electron mobility transistor direct-coupled FET logic inverters

The authors report the fabrication and characterization of E/D-mode 0.5 μm gate-length direct-coupled FET logic (DCFL) inverters, and an 11-stage ring oscillator with a 3-stage output buffer, based on these inverters. Testing of discrete 0.5 μm devices gave threshold voltages of 195 mV with a standard deviation of 9 mV for the E-HEMTs, and -365 mV with a standard deviation of 19 mV for the D-HEMTs. RF testing yields unity current gain cutoff frequencies (f_t) of 70 GHz and 67 GHz for the E-HEMTs and D-HEMTs respectively. The inverters were tested for DC performance and the voltage transfer curve shows noise margins of 145 mV at supply voltages as low as 0.6 V. The ring oscillator was tested using a spectrum analyzer and shows propagation delays as low as 20.66 ps/stage, power dissipation as low as 120 μW/stage, and power delay products as low as 2.65 fJ/stage. The fabrication process, inverters, and ring oscillator are described in detail