Scaling study of Si/SiGe MODFETs for RF applications

Author

Yang, L. ; Watling, J.R. ; Wilkins, R.C.W. ; Asenov, A. ; Barker, J.R. ; Roy, S. ; Hackbarth, T.

Author_Institution

Dept. of Electron. & Electr. Eng., Glasgow Univ., UK

fYear

2002

fDate

18-19 Nov. 2002

Firstpage

101

Lastpage

106

Abstract

Based on the successful calibration on a 0.25 μm strained Si/SiGe n-type MODFET, this paper presents a gate length scaling study of double-side doped Si/SiGe MODFETs. Our simulations show that gate length scaling improves device RF performance. However, the short channel effects (SCE) along with the parasitic delays limit the device performance improvements. We find that it is necessary to consider scaling (dimensions and doping) of both the lateral and vertical architecture in order to optimize the device design.

Keywords

Ge-Si alloys; doping profiles; electronic engineering computing; elemental semiconductors; high electron mobility transistors; microwave field effect transistors; optimisation; semiconductor device models; semiconductor materials; silicon; 0.25 micron; RF Si/SiGe MODFET gate length scaling study; SCE; Si-SiGe; device optimization; double-side doped MODFET RF performance; heterostructure modulation doped field effect transistors; lateral/vertical architecture dimension/doping scaling; parasitic delays; short channel effects; strained n-type MODFET calibration; Calibration; Capacitive sensors; Cutoff frequency; Germanium silicon alloys; HEMTs; MODFETs; MOSFETs; Medical simulation; Radio frequency; Silicon germanium;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices for Microwave and Optoelectronic Applications, 2002. EDMO 2002. The 10th IEEE International Symposium on

Print_ISBN

0-7803-7530-0

Type

conf

DOI

10.1109/EDMO.2002.1174938

Filename

1174938