• DocumentCode
    3117194
  • Title

    Designing processors using MAsS, a modular and lightweight instruction-level exploration tool

  • Author

    Texier, Matthieu ; Piriou, Erwan ; Thevenin, Mathieu ; David, Raphaël

  • Author_Institution
    Embedded Comput. Lab., CEA, Gif-sur-Yvette, France
  • fYear
    2011
  • fDate
    2-4 Nov. 2011
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    As application complexity increases, the design of efficient computing architectures able to cope with embedded constraints requires a fine algorithm analysis. This paper proposes an original approach based on Modular Assembly Simulator (MAsS) tool that allows Design Space Exploration (DSE) for programmable processors. The originality of the method resides in its capacity to generate operator level simulators allowing a quick code analysis from real data sets. This paper also presents two successfully designed architectures using MAsS.
  • Keywords
    computer architecture; embedded systems; microprocessor chips; MAsS; computing architectures; design space exploration; embedded constraints; lightweight instruction-level exploration tool; modular assembly simulator; modular instruction-level exploration tool; programmable processors; Algorithm design and analysis; Computer architecture; Kernel; Parallel processing; Program processors; Registers; VLIW;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design and Architectures for Signal and Image Processing (DASIP), 2011 Conference on
  • Conference_Location
    Tampere
  • Print_ISBN
    978-1-4577-0620-2
  • Electronic_ISBN
    978-1-4577-0619-6
  • Type

    conf

  • DOI
    10.1109/DASIP.2011.6136870
  • Filename
    6136870