Design and Simulation of a FPGA-Based Demodulator for Low-bit Remote Subcarrier Signal

Author

Gao Cuidong ; Qi, Zhao

Author_Institution

Sch. of Electron. & Inf. Eng., Beijing Univ. of Aeronaut. & Astronaut., Beijing, China

fYear

2009

fDate

28-29 Dec. 2009

Firstpage

85

Lastpage

88

Abstract

This paper mainly introduced a FPGA-based design model for low-bit Remote Subcarrier. This demodulation method is designed to accomplish carrier synchronization and bit synchronization quickly and effectively. It can achieve synchronization in FPGA which refer to the theory of software wireless. We should validate the arithmetic whether can satisfy the need for feasibility and reliability. The Simulation results of the design model show the model can meet the demodulation request.

Keywords

demodulators; field programmable gate arrays; synchronisation; FPGA-based demodulator; bit synchronization; carrier synchronization; low-bit remote subcarrier signal; software wireless theory; Arithmetic; Bit error rate; Communication system control; Demodulation; Design engineering; Electronic mail; Field programmable gate arrays; Gain control; Signal design; Signal to noise ratio; Carrier synchronization; FPGA; Low-bit rate; Remote Sub-carrier;

fLanguage

English

Publisher

ieee

Conference_Titel

Wireless Networks and Information Systems, 2009. WNIS '09. International Conference on

Conference_Location

Shanghai

Print_ISBN

978-0-7695-3901-0

Electronic_ISBN

978-1-4244-5400-6

Type

conf

DOI

10.1109/WNIS.2009.34

Filename

5381571