Electrical characterization of model-based dummy feature insertion in Cu interconnects

A methodology is proposed to characterize the electrical performance of model-based dummy feature insertion in Cu interconnect. Two types of test structures were designed to explore the electrical performance discrepancy between the rule-based and model-based dummy feature insertion. The sheet resistance dependency on design rule is characterized at the various density conditions. 2-D field solver extracts the parasitic capacitance caused by dummy feature insertion. A model-based dummy feature insertion algorithm using randomized shapes is proposed to assist the uniformity control of Cu CMP and MIT/SEMATECH 854 AZ test vehicle is used to demonstrate the feasibility of the proposed algorithm.