Dense, performance directed, auto place and route

DAPR (for Dense Auto Place and Route) is Intel´s place and route system for standard cell-based random logic. DAPR´s purpose is to produce dense, high-performance, design-rule clean double-layer metal layouts of the random logic modules within Intel custom application-specific standard product (ASSP) chips. DAPR´s primary inputs are a schematic chip plan, a standard cell library, and a technology file. Optionally, DAPR can read placement files and performance directive files. Techniques used by Intel´s standard cell and route system to achieve densities comparable to those of full custom design. Methods are presented by which the placement and routing process is directed by performance objectives