Designing a central synchronization/scheduling unit for multiprocessors

A parallel program being run on a multiprocessor can be represented by a task map: this is a directed graph describing the decomposition of the program into its computational granules (the tasks), and the precedence relations between them. The task map thereby defines the potential parallelism in executing the program. The program must be executed while satisfying the constraints defined by the task map (which is a synchronization requirement), and should be completed in a minimal time (which is a scheduling requirement). The synchronization and scheduling activities are not a part of the executed program, and constitute overhead. The finer the granularity, the more synchronization operations are performed, while the productive computational activity remains the same. Thus, the relative portion of the overhead increases. To solve the above problem, a thightly-coupled multiprocessor architecture has been proposed, whose novel component is a high flow-rate hardware subsystem for synchronization/scheduling. This article deals with the implementation and feasibility proof of the main unit included in the architecture-the central synchronization/scheduling unit