Optimal acyclic fine-grain scheduling with cache effects for embedded and real time systems

To sustain the increases in processor performance, embedded and real-time systems need to find the best total schedule time when compiling their application. The optimal acyclic scheduling problem is a classical challenge which has been formulated using integer programming in lot of works. In this paper, we give a new formulation of acyclic instruction scheduling problem under registers and resources constraints in multiple instructions issuing processors with cache effects. Given a direct acyclic graph G=(V,E), the complexity of our integer linear programming model is bounded by O(|V|²) variables and O(|E|+|V|²) constraints. This complexity is better than the complexity of the existing techniques which includes a worst total schedule time factor