DocumentCode
3122258
Title
Scheduling-based code size reduction in processors with indirect addressing mode
Author
Lim, Sungtaek ; Kim, Jihong ; Choi, Kiyoung
Author_Institution
Dynalith Syst. Co. Ltd., Taejon, South Korea
fYear
2001
fDate
2001
Firstpage
165
Lastpage
169
Abstract
DSPs are typically equipped with indirect addressing modes with auto-increment and auto-decrement, which provide efficient address arithmetic calculations. Such an addressing mode is maximally utilized by careful placement of variables in storage, thereby reducing the amount of address arithmetic instructions. Finding proper placement of variables in storage is called storage assignment problem and the result highly depends on the access sequence of variables. This paper suggests statement scheduling as a compiler optimization step to generate a better access sequence. Experimental results show 3.6% improvement on the average over naive storage assignment
Keywords
processor scheduling; program compilers; storage management; DSPs; access sequence; address arithmetic calculations; address arithmetic instructions; addressing mode; compiler optimization; indirect addressing mode; processors; scheduling-based code size reduction; statement scheduling; storage assignment problem; Arithmetic; Costs; Digital signal processing; Heuristic algorithms; Optimizing compilers; Permission; Processor scheduling; Registers; Semiconductor optical amplifiers; Unsolicited electronic mail;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware/Software Codesign, 2001. CODES 2001. Proceedings of the Ninth International Symposium on
Conference_Location
Copenhagen
Print_ISBN
1-58113-364-2
Type
conf
DOI
10.1109/HSC.2001.924669
Filename
924669
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