Multi gated device architectures advances, advantages and challenges

Author

Mathew, L. ; Yang Du ; Thean, Aaron Voon-Yew ; Sadd, M. ; Vandooren, A. ; Parker, Colita ; Stephens, T. ; Mora, R. ; Raghav Rai ; Zavala, M. ; Sing, D. ; Kalpai, S. ; Hughes, J. ; Shimer, R. ; Jallepalli, S. ; Workman, G. ; White, B.E. ; Nguyen, B.Y. ; Mo

Author_Institution

Adv. Products R&D Lab., Motorola Inc., Austin, TX, USA

fYear

2004

fDate

2004

Firstpage

97

Lastpage

98

Abstract

Device architectures incorporating multiple gate structures have been proposed to allow transistor scaling beyond the planar MCSFET integrations. These device architectures can improve performance such as better short channel performance and reduced leakage. In addition the additional channel surface and gate electrodes offers new circuit possibilities such as dynamic threshold voltage control and an RF mixer are demonstrated. It is desirable to fabricate multi-gated devices with the single gate on multiple sides and multiple gate electrodes this has been demonstrated successfully.

Keywords

CMOS integrated circuits; MOSFET; leakage currents; semiconductor device models; CMOS FinFET; CMOS MIGFET; RF mixer; device architectures; dynamic threshold voltage control; improved performance; multiple gate electrodes; multiple gate structures; planar MOSFET integrations; rail-to-rail transistor stack; reduced leakage; short channel performance; single gate on multiple sides; transistor scaling; Contacts; Electrodes; Fabrication; FinFETs; MOS devices; MOSFET circuits; Silicides; Silicon; Threshold voltage; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuit Design and Technology, 2004. ICICDT '04. International Conference on

Print_ISBN

0-7803-8528-4

Type

conf

DOI

10.1109/ICICDT.2004.1309916

Filename

1309916