• DocumentCode
    3128628
  • Title

    SON (Silicon-On-Nothing) P-MOSFETs with totally silicided (CoSi/sub 2/) polysilicon on 5 nm-thick Si-films: the simplest way to integration of metal gates on thin FD channels

  • Author

    Monfray, S. ; Skotnicki, T. ; Tavel, B. ; Morand, Y. ; Descombes, S. ; Talbot, A. ; Dutartre, D. ; Jenny, C. ; Mazoyer, P. ; Palla, R. ; Leverd, F. ; Le Friec, Y. ; Pantel, R. ; Haond, M. ; Charbuillet, C. ; Vizioz, C. ; Louis, D. ; Buffet, N.

  • Author_Institution
    ST Microelectronics, Crolles, France
  • fYear
    2002
  • fDate
    8-11 Dec. 2002
  • Firstpage
    263
  • Lastpage
    266
  • Abstract
    In this paper, the first SON (Silicon On Nothing) devices with metal gate are presented. Extremely thin fully depleted Si-films are recognized to be integrable with single-metal gate (mid-gap) due to their intrinsically low threshold voltage. In this work we present mid-gap CoSi/sub 2/ metal gate by total gate silicidation on SON transistors with Si-conduction channel thickness down to 5 nm. Due to its architecture and to the continuity between SD areas and the bulk, SON transistors allow deep silicidation processing down to the gate oxide, meaning that no more polysilicon is left. SON PMOS devices were performed with 55 nm CoSi/sub 2/ gate length with 5 nm of Si-channel thickness, and show excellent performances (350 /spl mu/A//spl mu/m I/sub on/ with only 0.1 nA I/sub off/ at -1.4 V with T/sub ox/=20 /spl Aring/). The polydepletion is of course suppressed and the gate resistance (<2 /spl Omega///spl square/) is very competitive for RF applications.
  • Keywords
    MOSFET; cobalt compounds; nanoelectronics; semiconductor device metallisation; silicon; 5 nm; 55 nm; CoSi/sub 2/-Si; P-MOSFETs; RF applications; SON PMOS devices; SON transistors; Si films; Si-conduction channel; ULSI; mid-gap CoSi/sub 2/ metal gate; p-channel MOSFETs; silicon on nothing devices; total gate silicidation; totally silicided polysilicon; Doping; MOS devices; MOSFET circuits; Microelectronics; Radio frequency; Silicidation; Silicon; Telecommunications; Thickness control; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 2002. IEDM '02. International
  • Conference_Location
    San Francisco, CA, USA
  • Print_ISBN
    0-7803-7462-2
  • Type

    conf

  • DOI
    10.1109/IEDM.2002.1175828
  • Filename
    1175828