DocumentCode
3129857
Title
Charge trapping in high k gate dielectric stacks
Author
Zafar, S. ; Callegari, A. ; Gusev, E. ; Fischetti, M.V.
Author_Institution
Div. of Res., IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fYear
2002
fDate
8-11 Dec. 2002
Firstpage
517
Lastpage
520
Abstract
Charge trapping in Al/sub 2/O/sub 3/ and HfO/sub 2/ nFETs is studied. The dependence of threshold voltage, subthreshold slope and gate leakage currents are investigated as a function of stressing time, voltage and temperature. Based on the experimental data, a model is developed for predicting threshold voltage shifts as a function stressing time. The model is compatible with both Al/sub 2/O/sub 3/ and HfO/sub 2/ data. Using the model, threshold voltage shifts after 10 years of stressing is predicted and trapping capture cross sections are estimated. A comparison between Al/sub 2/O/sub 3/ and HfO/sub 2/ is also made.
Keywords
MOSFET; alumina; dielectric thin films; electric charge; hafnium compounds; leakage currents; permittivity; semiconductor device models; 10 year; Al/sub 2/O/sub 3/; Al/sub 2/O/sub 3/ nFETs; HfO/sub 2/; HfO/sub 2/ nFETs; charge trapping; gate leakage currents; high-k gate dielectric stacks; model; stressing time; subthreshold slope; threshold voltage shift prediction; trapping capture cross sections estimation; Current measurement; Dielectric measurements; High K dielectric materials; High-K gate dielectrics; Leakage current; Predictive models; Pulse measurements; Stress measurement; Temperature dependence; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2002. IEDM '02. International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-7462-2
Type
conf
DOI
10.1109/IEDM.2002.1175893
Filename
1175893
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