Diagnosis framework for locating failed segments of path delay faults

Diagnosis tools can be used to speed up the process for finding the root causes of functional or performance problems in a VLSI circuit. In this paper, we proposed a method to locate possible segments that cause extra delays on circuit paths. We use the delay bounds of the tested paths to build linear constraints. By guiding the solutions of the above linear constraints with a linear programming solver, we can identify segments with extra delays. Also, with the ranks of segment delays, we can prioritize the search for possible locations of failed segments. In the diagnosis framework, we also propose to reduce the search space by identifying indistinguishable segments. Essentially, we cannot separate segments in the same category no matter which segments have faults. This approach greatly increases the efficiency of the diagnosis process. In the experimental results, for most cases of injecting 10% of the longest paths delays, the probabilities are over 90% for locating faulty segments within the list of top-ten candidates, and the average rankings are among the top 5 suspect locations