DocumentCode
3133296
Title
Formal specification and verification of embedded system with shared resources
Author
Bang, Ki-Seok ; Choi, Jin-Young ; Jang, Sung-Ho
Author_Institution
Dept. of Comput. Sci. & Eng., Korea Univ., Seoul, South Korea
fYear
2004
fDate
28-30 June 2004
Firstpage
8
Lastpage
14
Abstract
In order to achieve a correct implementation, it has been known that a specification and its verification in early design stage are important, especially during developing safety critical or embedded real-time systems. Statechart is a widely used graphical formal specification language; however, it is not trivial to specify software systems in case that shared resources have to be specified due to no concept of shared resources. In this paper, we present an extension of Statechart, Statechart with Shared Resources, the semantics of which are based on a process algebra, and we demonstrate its expressiveness by specifying (μC /OS II, one of the well-known real-time commercial operating systems used in various fields. Using a resource concept in Statechart, it is clear for designer to capture design requirements efficiently and can verify the requirement specifications formally using a tool called VERSA.
Keywords
embedded systems; formal specification; formal verification; operating systems (computers); process algebra; real-time systems; Statechart; VERSA; embedded system; formal specification; formal verification; process algebra; real-time operating systems; real-time systems; requirement specifications; shared resources; Algebra; Computer science; Design engineering; Embedded system; Formal specifications; Operating systems; Railway safety; Real time systems; Software systems; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Rapid System Prototyping, 2004. Proceedings. 15th IEEE International Workshop on
ISSN
1074-6005
Print_ISBN
0-7695-2159-2
Type
conf
DOI
10.1109/IWRSP.2004.1311088
Filename
1311088
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