• DocumentCode
    3135057
  • Title

    Convergent scheduling

  • Author

    Lee, Walter ; Puppin, Diego ; Swenson, Shane ; Amarasinghe, Saman

  • Author_Institution
    MIT, MA, USA
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    111
  • Lastpage
    122
  • Abstract
    Convergent scheduling is a general framework for cluster assignment and instruction scheduling on spatial architectures. A convergent scheduler is composed of independent passes, each implementing a heuristic that addresses a particular problem or constraint. The passes share a simple, common interface that provides spatial and temporal preference for each instruction. Preferences are not absolute; instead, the interface allows a pass to express the confidence of its preferences, as well as preferences for multiple space and time slots. A pass operates by modifying these preferences. By applying a series of passes that address all the relevant constraints, the convergent scheduler can produce a schedule that satisfies all the important constraints. Because all passes are independent and need to understand only one interface to interact with each other, convergent scheduling simplifies the problem of handling multiple constraints and co-developing different heuristics. We have applied convergent scheduling to two spatial architectures: the Raw processor and a clustered VLIW machine. It is able to successfully handle traditional constraints such as parallelism, load balancing, and communication minimization, as well as constraints due to preplaced instructions, which are instructions with predetermined cluster assignment. Convergent scheduling is able to obtain an average performance improvement of 21% over the existing space-time scheduler of the Raw processor, and an improvement of 14% over state-of-the-art assignment and scheduling techniques on a clustered VLIW architecture.
  • Keywords
    instruction sets; parallel architectures; processor scheduling; workstation clusters; Raw processor; cluster assignment; clustered VLIW machine; communication minimization; convergent scheduling; general framework; instruction scheduling; load balancing; multiple constraints; temporal preference; Pain; Tellurium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microarchitecture, 2002. (MICRO-35). Proceedings. 35th Annual IEEE/ACM International Symposium on
  • ISSN
    1072-4451
  • Print_ISBN
    0-7695-1859-1
  • Type

    conf

  • DOI
    10.1109/MICRO.2002.1176243
  • Filename
    1176243