Parity Prediction of S-Box for AES

Author

Kermani, Mehran Mozaffari ; Reyhani-Masoleh, Arash

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Western Ontario, London, Ont.

fYear

2006

fDate

38838

Firstpage

2357

Lastpage

2360

Abstract

In this paper, we present the parity prediction approach of the S-Box for designing high performance and fault detection structures of the AES. Unlike the traditional scheme which is based on using look-up tables, we use the logical gates implementation based on the composite fields for fault detection of S-Box in AES. We find closed formulations for the output parity bits of S-Box considering the composite-field transformation matrix and its inverse in GF(2⁸) as well as the affine transformation. To the best of our knowledge, no closed formulations for parity prediction of the S-Box have been proposed in the open literature

Keywords

Galois fields; cryptography; error detection; fault diagnosis; logic gates; matrix inversion; parity check codes; Galois field; S-Box; advanced encryption standard; affine transformation; composite field; fault detection structure; inverse transformation matrix; logical gate; look-up table; parity prediction; Costs; Cryptography; Fault detection; Galois fields; Hardware; High performance computing; NIST; Polynomials; Security; Software standards; Advanced Encryption Standard; S-Box; fault detection; finite field;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Computer Engineering, 2006. CCECE '06. Canadian Conference on

Conference_Location

Ottawa, Ont.

Print_ISBN

1-4244-0038-4

Electronic_ISBN

1-4244-0038-4

Type

conf

DOI

10.1109/CCECE.2006.277491

Filename

4054882