• DocumentCode
    3140858
  • Title

    Hardware Description Levels and Test for Complex Circuits

  • Author

    Bellon, C. ; Saucier, G. ; Gobbi, J.M.

  • Author_Institution
    Laboratoire IMAG BP., GRENOBLE, FRANCE
  • fYear
    1981
  • fDate
    29-1 June 1981
  • Firstpage
    213
  • Lastpage
    219
  • Abstract
    A complex circuit can be described at the structural level (gate or register transfer description), at the functional level (state based description) or at a higher level (algorithmic or behavioral level). Test methods have been studied at each level but present severe constraints : complexity problems for the structural level, and error hypotheses for the other levels. After a presentation of the state of the art, we show that the practical solution is a multilevel approach using the techniques of each type of these methods.
  • Keywords
    Automatic control; Automatic testing; Circuit faults; Circuit testing; Hardware; Integrated circuit interconnections; LAN interconnection; Large scale integration; Microprocessors; Registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1981. 18th Conference on
  • Type

    conf

  • DOI
    10.1109/DAC.1981.1585354
  • Filename
    1585354