• DocumentCode
    3141565
  • Title

    PAS-CIP: An Interactive Logic Design System

  • Author

    Odawara, Gotaro ; Kurishima, Satoshi ; Aoyama, Hiroshi ; Kanaya, Yasuhiko

  • Author_Institution
    University of Tokyo, Tokyo, Japan
  • fYear
    1981
  • fDate
    29-1 June 1981
  • Firstpage
    443
  • Lastpage
    450
  • Abstract
    This paper discusses a Circuit Information Processor(CIP), a subsystem of a Packaging Automation System(PAS), currently under development at the University of Tokyo. The CIP is an interactive design system for digital circuits. As an interactive tool for the CIP, a template which is used by the designer to enter the circuit information into the computer data base, has been developed in our laboratory. In the CIP, the data base for the packaging design system is generated by drawing a logic diagram with the template on a digitizer.
  • Keywords
    Automatic logic units; Circuit simulation; Circuit testing; Logic circuits; Logic design; Logic devices; Packaging; Process design; Routing; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1981. 18th Conference on
  • Type

    conf

  • DOI
    10.1109/DAC.1981.1585393
  • Filename
    1585393
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3141565