• DocumentCode
    3144808
  • Title

    Emulating FCFS OQ with Buffered Crossbar Based Distributed Shared Memory Switch

  • Author

    Hua, Nan ; Xu, Yang ; Liu, Bin ; Jin, Depeng ; Zeng, Lieguang

  • Author_Institution
    Tsinghua Univ., Beijing
  • fYear
    2007
  • fDate
    May 30 2007-June 1 2007
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Emulating output queued (OQ) switch with sustainable implementation cost and low fixed delay is always preferable in high performance router design. Distributed shared memory (DSM) switch, also called switch-memory-switch (SMS) router, provides a promising way towards emulating OQ in backbone switches. However, the previous architectures and algorithms for DSM/SMS switches require either high implementation cost or iterations of scheduling. This paper proposes a Buffered Crossbar based DSM switch (BC-DSM), which can emulate the FCFS OQ based on a speedup-two buffered crossbar. Each crosspoint has only two packet buffers, one for arrival packet and one for departure packet Different with previous works of DSM, we do not aim to resolve memory access conflicts when packets arrive, but to randomly dispatch packets into memories through buffered crossbar and resolve departure conflicts by bounded small queueing and delay. For scheduling, the departure packets are prioritized in the transferring between the fabric and the memory. The advantages of our scheme include: 1) Only N two-speedup memories and one two-speedup buffered N times N crossbar are needed. 2) Scheduling process is simple and distributive, thanks to buffered crossbar. 3) No need for additional crosspoint buffer for overcoming long round-trip time (RTT), thanks to the probabilistic load-balancing scheme. 4) Simulation shows that only a few fixed delay is needed to provide extremely low packet loss rate such as 10-8, under different types of traffic patterns, including bursty model and unbalanced model.
  • Keywords
    delays; distributed shared memory systems; packet switching; probability; queueing theory; resource allocation; scheduling; telecommunication network routing; telecommunication traffic; FCFS scheduling; buffered crossbar based distributed shared memory switch; bursty model; delay; high performance router design; output queued switch; probabilistic load-balancing scheme; switch-memory-switch router; traffic pattern; unbalanced model; Bandwidth; Computer science; Costs; Delay effects; Fabrics; Packet switching; Scheduling algorithm; Spine; Switches; Traffic control; BC-DSM; Buffered Crossbar; Distributed Shared Memory; Emulating FCFS OQ; Switch-Memory-Switch;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Switching and Routing, 2007. HPSR '07. Workshop on
  • Conference_Location
    Brooklyn, NY
  • Print_ISBN
    1-4244-1206-4
  • Electronic_ISBN
    1-4244-1206-4
  • Type

    conf

  • DOI
    10.1109/HPSR.2007.4281255
  • Filename
    4281255