DocumentCode
3148095
Title
Simulation and design of the code-decode circuits in PI-BIU interface unit chip based on Verilog
Author
Yan, Liu
Author_Institution
Coll. of Commun. Eng., Hangzhou Dianzi Univ., Hangzhou, China
fYear
2011
fDate
16-18 April 2011
Firstpage
5224
Lastpage
5227
Abstract
Verilog HDL is a specialized language for the description of hardware. It has widely application in circuit designing. The design description can be supported by different tools and simulated by different devices. PI bus conveys datum among multi-parallel-job modules. It is because of better compatibility, real-time and reliability that PI bus is usually used for the interlinkage of multi-parallel-job modules in multiprocessor system. As an example, the implementation and design of the code-decode circuits in PI-BIU interface unit chip based on Verilog language in this paper. It presented some thought on the application of EDA in these circuits and the methods on Verilog HDL.
Keywords
circuit reliability; decoding; hardware description languages; microprocessor chips; PI-BIU interface unit chip; circuit design; code-decode circuits; interlinkage; multiparallel-job modules; multiprocessor system; real-time; reliability; verilog HDL; verilog language; Decoding; Encoding; Error correction; Hardware design languages; Integrated circuit modeling; Integrated circuit reliability; PI-BIU; Verilog HDL; code-decode circuit; simulation and design;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, Communications and Networks (CECNet), 2011 International Conference on
Conference_Location
XianNing
Print_ISBN
978-1-61284-458-9
Type
conf
DOI
10.1109/CECNET.2011.5768226
Filename
5768226
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