DocumentCode
3152830
Title
A Routing Procedure for Mixed Array of Custom Macros and Standard Cells
Author
Terai, Hidekazu ; Hayase, Michiyoshi ; Kozawa, Tokinori
Author_Institution
Central Research Laboratory, Hitachi, Ltd., Tokyo, Japan
fYear
1985
fDate
23-26 June 1985
Firstpage
503
Lastpage
508
Abstract
Routing algorithms for multi- (more than 3) sided pin arrangements are presented. These algorithms are essential for layouts mixing standard cells with custom macros such as ROM, RAM, PLA and ALU. An extended layout model in which these algorithms are applied is also presented. An experimental result regarding the effect on block area with respect to cell height, obtained by comparing an extended model with a traditional model, is described.
Keywords
Automatic logic units; Laboratories; Large scale integration; Logic design; Pins; Programmable logic arrays; Read only memory; Routing; Shape; Solid modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1985. 22nd Conference on
ISSN
0738-100X
Print_ISBN
0-8186-0635-5
Type
conf
DOI
10.1109/DAC.1985.1585989
Filename
1585989
Link To Document