A formal technique for hardware interface design

In this paper, we address the problem of hardware interface design in a codesign approach. We refer to the hardware component as ASICs (Application Specific Integrated Circuits) and the software component as processors. We describe a formal technique for communication synthesis starting from hardware I/O transfer sequences computed by a high level synthesis tool, like GAUT. We focus on the allocation problem of necessary storage components needed for data communication between hardware-software components. The original nature of our work is the fact that a communication interface is generated at the same time as the hardware module which leads to better performance and optimization and ensures communication data coherency