• DocumentCode
    3156710
  • Title

    CMOS OTA compensating transconductance linearity with PMOS path

  • Author

    Kim, Doo-Hwan ; Cho, Kyoung-Rok

  • Author_Institution
    Dept. of Inf. & Commun. Eng., Chungbuk Nat. Univ., Cheongju
  • Volume
    01
  • fYear
    2008
  • fDate
    24-25 Nov. 2008
  • Abstract
    This paper describes a modified linear operational transconductance amplifier (OTA). We employ the PMOS input stage and PMOS mobility compensation circuit that combines the transistor paths operating at the triode region and subthreshold region that it extends input range to 50% of supply voltage. The circuit enhances linearity of the transconductance (Gm) under the wide input voltage range. The OTA is implemented using a 0.18-mum n-well 1P5M CMOS process under 1.8-V supply. The proposed OTA shows 1% Gm variation and the total harmonic distortion (THD) of below -43-dB under the input range of plusmn0.9-V.
  • Keywords
    CMOS integrated circuits; harmonic distortion; operational amplifiers; transistors; CMOS OTA compensating transconductance linearity; PMOS input stage; PMOS mobility compensation circuit; operational transconductance amplifier; subthreshold region; total harmonic distortion; transistor paths; triode region; voltage 1.8 V; CMOS process; Circuit simulation; Impedance; Linearity; MOS devices; Operational amplifiers; Total harmonic distortion; Transconductance; Transistors; Voltage; CMOS; Operational transconductance amplifier (OTA); linearity; mobility compensation; pseudo-differential; subthreshold region; transcondcutance (Gm);
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SoC Design Conference, 2008. ISOCC '08. International
  • Conference_Location
    Busan
  • Print_ISBN
    978-1-4244-2598-3
  • Electronic_ISBN
    978-1-4244-2599-0
  • Type

    conf

  • DOI
    10.1109/SOCDC.2008.4815564
  • Filename
    4815564