Robust digital voltage-mode controller design for split-inductor SEPIC converter

In this paper a robust digital voltage-mode controller design is designed for a split inductor SEPIC converter to achieve load voltage regulation. Split-inductor SEPIC converter salient features are compared with the conventional SEPIC converter and then discrete-time mathematical models are established. Digital controller is designed using discrete-time model through direct digital design approach. A two-pole two-zero compensator is adopted in the design and then an edge theorem is employed for testing the robustness of the controller. Compensator design is validated through simulations and then experimental measurements. Load voltage regulation characteristics are obtained against line and load perturbations. A 15 -to- 36 V, 25 Watt laboratory prototype converter is built for experimental investigations. Simulation and experimental results are demonstrating the robustness feature of the designed digital controller.