DocumentCode
3158864
Title
Electromigration wafer level reliability test and analysis methodology
Author
Weis, E.A. ; Kinsbron, E. ; Chanoch, G. ; Snyder, M.M. ; Vogel, B. ; Croitoru, N.
Author_Institution
Fac. of Eng., Tel-Aviv Univ., Ramat-Aviv, Israel
fYear
1991
fDate
5-7 Mar 1991
Firstpage
59
Lastpage
60
Abstract
As an outcome of the advances in integrated circuit fabrication technology, electromigration has become a major reliability concern in silicon VLSI circuits. This paper presents an innovative testing and analysis approach, that has been implemented, and allows a substantial reduction in the electromigration test times of VLSI metal thin film
Keywords
VLSI; electromigration; life testing; materials testing; metallisation; reliability; Al metallisation; Si circuits; VLSI; analysis approach; analysis methodology; electromigration test times; innovative testing; metal thin film; reliability concern; wafer level reliability test; Aluminum; Circuit testing; Conducting materials; Conductive films; Conductivity; Copper; Electromigration; Electrons; Failure analysis; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Electronics Engineers in Israel, 1991. Proceedings., 17th Convention of
Conference_Location
Tel Aviv
Print_ISBN
0-87942-678-0
Type
conf
DOI
10.1109/EEIS.1991.217713
Filename
217713
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