VLSI-architecture for enabling multiple parallel associative searches with standard SRAM macros

This paper presents a ternary multi-ported content addressable memory (CAM) architecture utilizing asynchronous multiple search-operation technology, aiming at efficient high throughput of associative-search operations. The asynchronous multiple search-operation technology adopts a Flexible Multi-ported Content Addressable Memory (FMCAM) architecture, which is reported. The proposed ternary multi-ported CAM architecture achieves a fast associative table-lookup solution for high-speed routing applications, such as IP packet forwarding and effectively realizes a Ternary Flexible Multi-ported Content Addressable Memory which we refer to as TFMCAM in this paper. The main novel points of the architecture are simultaneous multiple associative-search operations and a high implementation-yield ratio. The TFMCAM can fully exploit the conventional SRAM memory architecture in comparison to the conventional TCAM architecture. Furthermore, the TFMCAM architecture realizes the necessary background table maintenance function without preventing the associative-search operation. For verifying the effectiveness of the TFMCAM architecture, ASIC implementation results are evaluated in this paper.